Ritsumeikan University Biwako-Kusatsu Campus (BKC)
Lake Biwa, Japan (Hybrid Conference), 15-16th, June 2023

RISC-V is inevitable

RISC-V has grown from a university project into a global open standard with a thriving ecosystem comprising hundreds of collaborating organizations, including most of the major companies in computing. This talk will describe how RISC-V is inevitable across all of computing, displacing legacy proprietary instruction sets.

Also, as the inventors of RISC-V and performance density leaders, we would like to introduce SiFive’s new P600 and P400 series of RISC-V processors, which are perfectly tuned to offer the best power and performance efficiency and compute density for next generation wearables, the smart home, industrial automation, and other consumer devices.


Sam Rogan
Vice President,  President of SiFive Japan

Sam Rogan is Vice President,  President of SiFive Japan. Having lived in Japan for more than 30 years, Sam has held top management roles at AMD, Spansion, and Xilinx, where he most recently served for 13 years as the President of Japan and Asia Pacific.

Yoshihito Kondo
Sr. Director FAE,
SiFive Japan

He has been working for Sony Corporation since 1990 and has been involved in the development of media processors. Engaged in CMOS image sensor development at Sony LSI Design Inc. from 2012. Joined SiFive Japan Corp. in 2022/10 and is currently in charge of technical support for customers.

An Introduction to the Open FPGA Stack

A major barrier to FPGA adoption, even in applications where an FPGA-based solution is the most optimal in terms of power and performance, is accessibility to a larger number of developers. Given the complexities of modern FPGA designs, rarely is a single development team responsible for all the IP and software required to perform a solution. In order to achieve productivity scale, a common means to integrate various IP solutions both in hardware and software is desired. 

The Open FPGA Stack (OFS) is a complete hardware and software infrastructure that is fully open-sourced and comprises composable hardware code and upstreamed kernel code to kernel.org to enable a collaborative community of FPGA developers. This includes IP developers, board vendors, and software service providers. 

Steve Jahnke
Platform architect,
Programmable Solutions Group,
Intel Corporation

Steve Jahnke is a platform architect within the Programmable Solutions Group at Intel. He has held a variety of engineering design, management and architecture roles in various locations, including nine years in Japan. He is the primary or sole inventor on over 20 issued patents, and holds a Master in Electrical Engineering degree from Rice University (Houston, TX) and a Bachelors of Science in Electrical Engineering from Northwestern University (Evanston, IL).